{"id":280,"date":"2024-09-24T13:58:56","date_gmt":"2024-09-24T17:58:56","guid":{"rendered":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/?post_type=avada_portfolio&p=280"},"modified":"2024-09-27T14:28:21","modified_gmt":"2024-09-27T18:28:21","slug":"chris-bailey","status":"publish","type":"avada_portfolio","link":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/portfolio-items\/chris-bailey\/","title":{"rendered":"Chris Bailey, Ph.D."},"content":{"rendered":"

Chris Bailey<\/strong> worked for the U.K.\u2019s\u00a0University of Greenwich<\/a>, his alma mater formerly known as Thames Polytechnic, for more than 30 years. The longtime academic started at the school as a senior research fellow in 1991. Over the years, Bailey advanced to become an associate dean of research for the engineering and science faculty.<\/p>\n

Now he\u2019s coming to Arizona State University as a professor in the\u00a0School of Electrical, Computer and Energy Engineering<\/a>, one of the seven schools in the\u00a0Ira A. Fulton Schools of Engineering<\/a>\u00a0at ASU. Bailey will teach electronics packaging, which refers to the casing around a semiconductor. The field is one of his primary research specialties.<\/p>\n

\u201cAs the limits are reached in terms of transistor scaling and its economics, innovations in advanced semiconductor packaging are increasingly essential to maintain innovation and improvements in system performance,\u201d Bailey says. \u201cThis is an exciting, changing landscape for future research and workforce development.\u201d<\/p>\n

The growing semiconductor industry in Arizona and the opportunities presented by ASU\u2019s research capabilities attracted Bailey to make the move to the Southwest. He specifically acknowledged ASU\u2019s semiconductor research facilities as state-of-the-art.<\/p>\n

Bailey hopes to start a semiconductor packaging research center at ASU that ranks among the best in the world.<\/p>\n

\u201cThere is a unique opportunity to grow a multidisciplinary team, combining expertise in electronic packaging design, multi-physics modeling, advanced manufacturing and reliability,\u201d he says.<\/p>\n

Bailey comes to ASU with recent awards in tow. From 2020 to 2021, he served as the president of the\u00a0Institute of Electrical and Electronics Engineers Electronics Packaging Society<\/a>. He won the organization\u2019s David Feldman Outstanding Achievement Award in 2022. Bailey also won the\u00a0EuroSimE 2022 Achievement Award<\/a> for his work on thermal and multi-physics simulations and research on the simulations\u2019 industrial applications and co-chairing the EuroSimE technical committee.<\/p>\n

When not teaching or conducting research, Bailey enjoys walking, reading history books, traveling and watching movies.<\/p>\n

Degree:\u00a0<\/strong>Ph.D., computational modeling, Thames Polytechnic, 1988<\/p>\n

Expertise:\u00a0<\/strong>Electronics packaging, multi-physics modeling, reliability<\/p>\n","protected":false},"excerpt":{"rendered":"

Chris Bailey<\/strong> worked for the U.K.\u2019s\u00a0University of Greenwich<\/a>, his alma mater formerly known as Thames Polytechnic, for more than 30 years. The longtime academic started at the school as a senior research fellow in 1991. Over the years, Bailey advanced to become an associate dean of research for the engineering and science faculty.<\/p>\n

Now he\u2019s coming to Arizona State University as a professor in the\u00a0School of Electrical, Computer and Energy Engineering<\/a>, one of the seven schools in the\u00a0Ira A. Fulton Schools of Engineering<\/a>\u00a0at ASU. Bailey will teach electronics packaging, which refers to the casing around a semiconductor. The field is one of his primary research specialties.<\/p>\n

\u201cAs the limits are reached in terms of transistor scaling and its economics, innovations in advanced semiconductor packaging are increasingly essential to maintain innovation and improvements in system performance,\u201d Bailey says. \u201cThis is an exciting, changing landscape for future research and workforce development.\u201d<\/p>\n

The growing semiconductor industry in Arizona and the opportunities presented by ASU\u2019s research capabilities attracted Bailey to make the move to the Southwest. He specifically acknowledged ASU\u2019s semiconductor research facilities as state-of-the-art.<\/p>\n

Bailey hopes to start a semiconductor packaging research center at ASU that ranks among the best in the world.<\/p>\n

\u201cThere is a unique opportunity to grow a multidisciplinary team, combining expertise in electronic packaging design, multi-physics modeling, advanced manufacturing and reliability,\u201d he says.<\/p>\n

Bailey comes to ASU with recent awards in tow. From 2020 to 2021, he served as the president of the\u00a0Institute of Electrical and Electronics Engineers Electronics Packaging Society<\/a>. He won the organization\u2019s David Feldman Outstanding Achievement Award in 2022. Bailey also won the\u00a0EuroSimE 2022 Achievement Award<\/a> for his work on thermal and multi-physics simulations and research on the simulations\u2019 industrial applications and co-chairing the EuroSimE technical committee.<\/p>\n

When not teaching or conducting research, Bailey enjoys walking, reading history books, traveling and watching movies.<\/p>\n

Degree:\u00a0<\/strong>Ph.D., computational modeling, Thames Polytechnic, 1988<\/p>\n

Expertise:\u00a0<\/strong>Electronics packaging, multi-physics modeling, reliability<\/p>\n","protected":false},"author":2,"featured_media":267,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","format":"standard","meta":{"footnotes":""},"portfolio_category":[9],"portfolio_skills":[],"portfolio_tags":[],"class_list":["post-280","avada_portfolio","type-avada_portfolio","status-publish","format-standard","has-post-thumbnail","hentry","portfolio_category-speakers"],"yoast_head":"\nChris Bailey, Ph.D. - PCWC 2024<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/chips.ieeeusa.org\/pcwc-2024\/portfolio-items\/chris-bailey\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Chris Bailey, Ph.D. - PCWC 2024\" \/>\n<meta property=\"og:description\" content=\"Chris Bailey worked for the U.K.\u2019s\u00a0University of Greenwich, his alma mater formerly known as Thames Polytechnic, for more than 30 years. The longtime academic started at the school as a senior research fellow in 1991. Over the years, Bailey advanced to become an associate dean of research for the engineering and science faculty. Now he\u2019s coming to Arizona State University as a professor in the\u00a0School of Electrical, Computer and Energy Engineering, one of the seven schools in the\u00a0Ira A. Fulton Schools of Engineering\u00a0at ASU. Bailey will teach electronics packaging, which refers to the casing around a semiconductor. The field is one of his primary research specialties. \u201cAs the limits are reached in terms of transistor scaling and its economics, innovations in advanced semiconductor packaging are increasingly essential to maintain innovation and improvements in system performance,\u201d Bailey says. \u201cThis is an exciting, changing landscape for future research and workforce development.\u201d The growing semiconductor industry in Arizona and the opportunities presented by ASU\u2019s research capabilities attracted Bailey to make the move to the Southwest. He specifically acknowledged ASU\u2019s semiconductor research facilities as state-of-the-art. Bailey hopes to start a semiconductor packaging research center at ASU that ranks among the best in the world. \u201cThere is a unique opportunity to grow a multidisciplinary team, combining expertise in electronic packaging design, multi-physics modeling, advanced manufacturing and reliability,\u201d he says. Bailey comes to ASU with recent awards in tow. From 2020 to 2021, he served as the president of the\u00a0Institute of Electrical and Electronics Engineers Electronics Packaging Society. He won the organization\u2019s David Feldman Outstanding Achievement Award in 2022. Bailey also won the\u00a0EuroSimE 2022 Achievement Award for his work on thermal and multi-physics simulations and research on the simulations\u2019 industrial applications and co-chairing the EuroSimE technical committee. When not teaching or conducting research, Bailey enjoys walking, reading history books, traveling and watching movies. Degree:\u00a0Ph.D., computational modeling, Thames Polytechnic, 1988 Expertise:\u00a0Electronics packaging, multi-physics modeling, reliability\" \/>\n<meta property=\"og:url\" content=\"https:\/\/chips.ieeeusa.org\/pcwc-2024\/portfolio-items\/chris-bailey\/\" \/>\n<meta property=\"og:site_name\" content=\"PCWC 2024\" \/>\n<meta property=\"article:modified_time\" content=\"2024-09-27T18:28:21+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/chips.ieeeusa.org\/pcwc-2024\/wp-content\/uploads\/sites\/3\/2024\/09\/Chris_Bailey.jpg\" \/>\n\t<meta property=\"og:image:width\" content=\"1500\" \/>\n\t<meta property=\"og:image:height\" content=\"1500\" \/>\n\t<meta property=\"og:image:type\" content=\"image\/jpeg\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"Est. reading time\" \/>\n\t<meta name=\"twitter:data1\" content=\"2 minutes\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\\\/\\\/schema.org\",\"@graph\":[{\"@type\":\"WebPage\",\"@id\":\"https:\\\/\\\/chips.ieeeusa.org\\\/pcwc-2024\\\/portfolio-items\\\/chris-bailey\\\/\",\"url\":\"https:\\\/\\\/chips.ieeeusa.org\\\/pcwc-2024\\\/portfolio-items\\\/chris-bailey\\\/\",\"name\":\"Chris Bailey, Ph.D. - PCWC 2024\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/chips.ieeeusa.org\\\/pcwc-2024\\\/#website\"},\"primaryImageOfPage\":{\"@id\":\"https:\\\/\\\/chips.ieeeusa.org\\\/pcwc-2024\\\/portfolio-items\\\/chris-bailey\\\/#primaryimage\"},\"image\":{\"@id\":\"https:\\\/\\\/chips.ieeeusa.org\\\/pcwc-2024\\\/portfolio-items\\\/chris-bailey\\\/#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/chips.ieeeusa.org\\\/pcwc-2024\\\/wp-content\\\/uploads\\\/sites\\\/3\\\/2024\\\/09\\\/Chris_Bailey.jpg\",\"datePublished\":\"2024-09-24T17:58:56+00:00\",\"dateModified\":\"2024-09-27T18:28:21+00:00\",\"breadcrumb\":{\"@id\":\"https:\\\/\\\/chips.ieeeusa.org\\\/pcwc-2024\\\/portfolio-items\\\/chris-bailey\\\/#breadcrumb\"},\"inLanguage\":\"en-US\",\"potentialAction\":[{\"@type\":\"ReadAction\",\"target\":[\"https:\\\/\\\/chips.ieeeusa.org\\\/pcwc-2024\\\/portfolio-items\\\/chris-bailey\\\/\"]}]},{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\\\/\\\/chips.ieeeusa.org\\\/pcwc-2024\\\/portfolio-items\\\/chris-bailey\\\/#primaryimage\",\"url\":\"https:\\\/\\\/chips.ieeeusa.org\\\/pcwc-2024\\\/wp-content\\\/uploads\\\/sites\\\/3\\\/2024\\\/09\\\/Chris_Bailey.jpg\",\"contentUrl\":\"https:\\\/\\\/chips.ieeeusa.org\\\/pcwc-2024\\\/wp-content\\\/uploads\\\/sites\\\/3\\\/2024\\\/09\\\/Chris_Bailey.jpg\",\"width\":1500,\"height\":1500,\"caption\":\"Chris Bailey, Ph.D.\"},{\"@type\":\"BreadcrumbList\",\"@id\":\"https:\\\/\\\/chips.ieeeusa.org\\\/pcwc-2024\\\/portfolio-items\\\/chris-bailey\\\/#breadcrumb\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"Home\",\"item\":\"https:\\\/\\\/chips.ieeeusa.org\\\/pcwc-2024\\\/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"Portfolio\",\"item\":\"https:\\\/\\\/chips.ieeeusa.org\\\/pcwc-2024\\\/portfolio-items\\\/\"},{\"@type\":\"ListItem\",\"position\":3,\"name\":\"Chris Bailey, Ph.D.\"}]},{\"@type\":\"WebSite\",\"@id\":\"https:\\\/\\\/chips.ieeeusa.org\\\/pcwc-2024\\\/#website\",\"url\":\"https:\\\/\\\/chips.ieeeusa.org\\\/pcwc-2024\\\/\",\"name\":\"PCWC 2024\",\"description\":\"Packaging Chips with CHIPS\",\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\\\/\\\/chips.ieeeusa.org\\\/pcwc-2024\\\/?s={search_term_string}\"},\"query-input\":{\"@type\":\"PropertyValueSpecification\",\"valueRequired\":true,\"valueName\":\"search_term_string\"}}],\"inLanguage\":\"en-US\"}]}<\/script>\n<!-- \/ Yoast SEO plugin. -->","yoast_head_json":{"title":"Chris Bailey, Ph.D. - PCWC 2024","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/portfolio-items\/chris-bailey\/","og_locale":"en_US","og_type":"article","og_title":"Chris Bailey, Ph.D. - PCWC 2024","og_description":"Chris Bailey worked for the U.K.\u2019s\u00a0University of Greenwich, his alma mater formerly known as Thames Polytechnic, for more than 30 years. The longtime academic started at the school as a senior research fellow in 1991. Over the years, Bailey advanced to become an associate dean of research for the engineering and science faculty. Now he\u2019s coming to Arizona State University as a professor in the\u00a0School of Electrical, Computer and Energy Engineering, one of the seven schools in the\u00a0Ira A. Fulton Schools of Engineering\u00a0at ASU. Bailey will teach electronics packaging, which refers to the casing around a semiconductor. The field is one of his primary research specialties. \u201cAs the limits are reached in terms of transistor scaling and its economics, innovations in advanced semiconductor packaging are increasingly essential to maintain innovation and improvements in system performance,\u201d Bailey says. \u201cThis is an exciting, changing landscape for future research and workforce development.\u201d The growing semiconductor industry in Arizona and the opportunities presented by ASU\u2019s research capabilities attracted Bailey to make the move to the Southwest. He specifically acknowledged ASU\u2019s semiconductor research facilities as state-of-the-art. Bailey hopes to start a semiconductor packaging research center at ASU that ranks among the best in the world. \u201cThere is a unique opportunity to grow a multidisciplinary team, combining expertise in electronic packaging design, multi-physics modeling, advanced manufacturing and reliability,\u201d he says. Bailey comes to ASU with recent awards in tow. From 2020 to 2021, he served as the president of the\u00a0Institute of Electrical and Electronics Engineers Electronics Packaging Society. He won the organization\u2019s David Feldman Outstanding Achievement Award in 2022. Bailey also won the\u00a0EuroSimE 2022 Achievement Award for his work on thermal and multi-physics simulations and research on the simulations\u2019 industrial applications and co-chairing the EuroSimE technical committee. When not teaching or conducting research, Bailey enjoys walking, reading history books, traveling and watching movies. Degree:\u00a0Ph.D., computational modeling, Thames Polytechnic, 1988 Expertise:\u00a0Electronics packaging, multi-physics modeling, reliability","og_url":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/portfolio-items\/chris-bailey\/","og_site_name":"PCWC 2024","article_modified_time":"2024-09-27T18:28:21+00:00","og_image":[{"width":1500,"height":1500,"url":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/wp-content\/uploads\/sites\/3\/2024\/09\/Chris_Bailey.jpg","type":"image\/jpeg"}],"twitter_card":"summary_large_image","twitter_misc":{"Est. reading time":"2 minutes"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"WebPage","@id":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/portfolio-items\/chris-bailey\/","url":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/portfolio-items\/chris-bailey\/","name":"Chris Bailey, Ph.D. - PCWC 2024","isPartOf":{"@id":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/#website"},"primaryImageOfPage":{"@id":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/portfolio-items\/chris-bailey\/#primaryimage"},"image":{"@id":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/portfolio-items\/chris-bailey\/#primaryimage"},"thumbnailUrl":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/wp-content\/uploads\/sites\/3\/2024\/09\/Chris_Bailey.jpg","datePublished":"2024-09-24T17:58:56+00:00","dateModified":"2024-09-27T18:28:21+00:00","breadcrumb":{"@id":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/portfolio-items\/chris-bailey\/#breadcrumb"},"inLanguage":"en-US","potentialAction":[{"@type":"ReadAction","target":["https:\/\/chips.ieeeusa.org\/pcwc-2024\/portfolio-items\/chris-bailey\/"]}]},{"@type":"ImageObject","inLanguage":"en-US","@id":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/portfolio-items\/chris-bailey\/#primaryimage","url":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/wp-content\/uploads\/sites\/3\/2024\/09\/Chris_Bailey.jpg","contentUrl":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/wp-content\/uploads\/sites\/3\/2024\/09\/Chris_Bailey.jpg","width":1500,"height":1500,"caption":"Chris Bailey, Ph.D."},{"@type":"BreadcrumbList","@id":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/portfolio-items\/chris-bailey\/#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/"},{"@type":"ListItem","position":2,"name":"Portfolio","item":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/portfolio-items\/"},{"@type":"ListItem","position":3,"name":"Chris Bailey, Ph.D."}]},{"@type":"WebSite","@id":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/#website","url":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/","name":"PCWC 2024","description":"Packaging Chips with CHIPS","potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/?s={search_term_string}"},"query-input":{"@type":"PropertyValueSpecification","valueRequired":true,"valueName":"search_term_string"}}],"inLanguage":"en-US"}]}},"_links":{"self":[{"href":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/wp-json\/wp\/v2\/avada_portfolio\/280","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/wp-json\/wp\/v2\/avada_portfolio"}],"about":[{"href":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/wp-json\/wp\/v2\/types\/avada_portfolio"}],"author":[{"embeddable":true,"href":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/wp-json\/wp\/v2\/comments?post=280"}],"version-history":[{"count":0,"href":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/wp-json\/wp\/v2\/avada_portfolio\/280\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/wp-json\/wp\/v2\/media\/267"}],"wp:attachment":[{"href":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/wp-json\/wp\/v2\/media?parent=280"}],"wp:term":[{"taxonomy":"portfolio_category","embeddable":true,"href":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/wp-json\/wp\/v2\/portfolio_category?post=280"},{"taxonomy":"portfolio_skills","embeddable":true,"href":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/wp-json\/wp\/v2\/portfolio_skills?post=280"},{"taxonomy":"portfolio_tags","embeddable":true,"href":"https:\/\/chips.ieeeusa.org\/pcwc-2024\/wp-json\/wp\/v2\/portfolio_tags?post=280"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}